Clock Design Engineer job opportunity at NVIDIA.

Master's (M.Sc.)

Tel Aviv, Beer Sheva, Yokneam, Raanana, Israel

Tel Aviv, Beer..........Israel

The #NVIDIA System-On-Chip (SOC) group is looking for a top #ASIC #Engineer with a curiosity about SOC #design #automation, RTL integration, chip build and assembly and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level owners, Physical Design, #CAD, Package Design, #Software, DFT and other teams. __ What you'll be doing: Designing and implementing SOC level clock requirements Developing and deploying automation flows which support SOC level design Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues __ What we need to see: B.SC./ M.SC. in Electrical Engineering/Computer Engineering. 3+ years of relevant experience in chip design Solid hands-on RTL design skills in Verilog Proficiency in at least one common scripting languages like python, bash, tcl. Great teammate. __ Ways to stand out from the crowd: Passion for quality. Experience with delivery to physical design, emulation, firmware and other customers At #NVIDIA, you will be immersed in a diverse and encouraging environment where everyone is encouraged to do their best work. Join us and see how you can make a lasting impact on the world. Widely considered to be one of the technology world's most desirable employers, NVIDIA offers highly competitive salaries and comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/