Logic Design Engineer job opportunity at Intel.

Home Jobs In United States Of America Tag: Job Logic Design Engineer position at Intel


DatePosted Today bot
Intel Logic Design Engineer
Experience: 4-years
Pattern: full-time
Country:
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation US, Massachusetts, Beaver Brook, United States Of America
loacation US, Massachuse..........United States Of America

Job Details: Job Description:  Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Responsibilities include: Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high-quality integration and verification of the IP block. Drives quality assurance compliance for smooth IPSoC handoff. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelors & 4+ years or Masters & 3+ years in Electrical Engineering, Computer Engineering or Computer Science or equivalent, with the years of relevant experience in the skills below: Program/project management Digital IP development flow and methodology from concept to production Preferred Skills: 5+ Years of hands on experience in Intel IP/SoC /Platform programs, definition, planning and/or PLC management for IPs/SoCs/Platforms Proficiency at using key Intel Systems of Record like HSD-ES, Carbon, Atlas and PVIM Possess excellent working knowledge of Microsoft Project, Excel and PowerPoint Experience working with ecosystem partners, suppliers and EDA vendors in putting together SoWs, and NDAs is desirable Working knowledge of Jira is a plus Proven leadership, Proactive and highly self-motivated; good critical thinking skills and strong attention to detail Experience in working with senior, cross function/cross organization teams Strong communicator to manage a complex set of stakeholders - across multiple organizational levels and geographies Strong financial acumen and analytical skills, along with experience in driving efficiencies across an organization Innovation/change agent            Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location:  US, Massachusetts, Beaver Brook Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .     Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USD     The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.     Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Other Ai Matches

Customer Validation Enabling Engineer - Intern Applicants are expected to have a solid experience in handling Job related tasks
Memory Debug Engineer Applicants are expected to have a solid experience in handling Job related tasks
Analog Circuit Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
CPU Backend Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Packaging Module Equipment Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior SoC Logic Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Intel Foundry Customer Quality Engineer Applicants are expected to have a solid experience in handling Job related tasks
Layout Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Director, Software Engineering Applicants are expected to have a solid experience in handling Software Engineering related tasks
Logic Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Software Performance Engineer Applicants are expected to have a solid experience in handling Job related tasks
Network Monitoring Security Engineer Applicants are expected to have a solid experience in handling Job related tasks
Software Enabling and Optimization Engineer Applicants are expected to have a solid experience in handling Job related tasks
Supply Chain GSCO CoE Process Automation Program Manager Applicants are expected to have a solid experience in handling Job related tasks
Graduate Talent (Pre-si System Validation) Applicants are expected to have a solid experience in handling Job related tasks
Compiler Engineer Applicants are expected to have a solid experience in handling Job related tasks
Mechanical\Materials\Chemical Engineering Student for Intel Kiryat Gat Applicants are expected to have a solid experience in handling Job related tasks
Platform Application Engineer (DPDK/Cloud-native/AI) Applicants are expected to have a solid experience in handling Job related tasks
Senior Account Sales Manager Applicants are expected to have a solid experience in handling Job related tasks
FCS Risk and Audit Manager Applicants are expected to have a solid experience in handling Job related tasks
SoC Design Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Rebate Global Process Owner Analyst Applicants are expected to have a solid experience in handling Job related tasks
Graduate Talent [E-core (Atom) CPU Circuit Design] Applicants are expected to have a solid experience in handling Job related tasks