Senior Embedded Software Engineer job opportunity at Infleqtion.

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Date2026-02-06T22:46:42.118Z bot
Infleqtion Senior Embedded Software Engineer
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Pattern: Full-time
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loacation Louisville, United States Of America
loacation Louisville....United States Of America

At  Infleqtion  we solve the world’s most challenging problems using cutting-edge quantum technology. Our mission is to commercialize atom-based quantum products that provide orders of magnitude improvements in sensing and computing applications. We are proud to work tirelessly to create and lead the quantum ecosystem towards meaningful advancements today and set the technology roadmap for tomorrow.  POSITION SUMMARY   Within Infleqtion’s Computing Product Group (CPG), the Hardware Engineering Team is seeking a Senior Embedded Software Engineer to own and deliver high‑performance embedded and systems software enabling real‑time quantum error correction and classical control at scale. This role focuses on integrating NVIDIA high‑speed interconnects with quantum error‑correction decoding pipelines, in close collaboration with quantum software, physics, and hardware teams.    This position is scoped as a senior‑level individual contributor role: the engineer independently owns complex subsystems end‑to‑end within an established architecture, solves technically hard problems, interacts directly with external partners, and mentors developing engineers, without defining long‑term platform architecture. The engineer will also serve as a point-of-contact (POC) for subsystem hardware integration with NVidia’s NVQLink.  JOB RESPONSIBILITIES  Typically, you will be entrusted with:  Independently design, implement, validate, and maintain embedded and systems‑level software subsystems supporting real‑time quantum error correction and control.  Translate quantum error‑correction requirements (code distance, syndrome rates, latency budgets) into concrete classical compute, memory, and interconnect requirements.  Design systems that meet deterministic latency, bandwidth, and reliability requirements across CPU, GPU, FPGA, and high‑speed interconnect domains.  Serve as the technical point‑of‑contact for NVIDIA NVQLink integration, including topology, bandwidth modeling, latency characterization, and failure modes. Involves direct interaction with NVIDIA personnel as well as HPC experts in academia and US national labs.  Collaborate closely with Quantum Software, Physics, Electrical, and Systems Engineering to co‑design hardware/software interfaces.  Troubleshoot and resolve complex performance, scaling, and integration issues spanning firmware, drivers, OS (Embedded Linux / bare-metal environments), GPU runtimes, and hardware.  Develop and maintain validation infrastructure, performance benchmarks, and test harnesses for deterministic behavior and scaling.  Provide informal mentorship through design reviews, code reviews, and technical guidance. WE HOPE YOU HAVE:  A degree (PhD preferred) in Computer Engineering, Electrical Engineering, Computer Science, or related field with experience in high-performance computing (HPC).  Demonstrated experience owning complex embedded or systems‑level software subsystems end‑to‑end.  Strong experience with C/C++ in performance‑critical systems.  Experience debugging across software and hardware boundaries (drivers, firmware, interconnects, timing).  Solid understanding of computer architecture fundamentals (memory hierarchies, interconnects, latency vs throughput tradeoffs).  Experience with hardware/software co‑design for quantum control systems  Experience working in Linux‑based embedded or HPC environments.  Familiarity with GPU programming models (CUDA or equivalent) at a systems level.  WE HIGHLY VALUE:  High‑performance computing (HPC) systems design or deployment.  Familiary with NVIDIA CUDA-Q  Direct experience with NVIDIA Holoscan Sensor Bridge, RDMA over Converged Ethernet, or similar high‑speed coherent interconnects.  Experience supporting or developing error‑correction decoding pipelines (quantum or classical).  Background similar to advanced academic research groups in quantum architectures or decoding (e.g., large‑scale syndrome decoding research).  Experience performance‑modeling compute systems as a function of problem size and algorithmic complexity.  Exposure to FPGA‑accelerated or heterogeneous compute systems.  Detail-oriented mindset with a strong sense of ownership and technical accountability.   Positive, collaborative working style and enthusiasm for mentoring and developing engineers.   NOTE   Job responsibilities and requirements are illustrative, other responsibilities may be assigned as needed.  This position may require access to information protected under U.S. export control laws and regulations, including the Export Administration Regulations (EAR) and the International Traffic in Arms Regulations (ITAR). Please note that any offer for employment may be conditioned on authorization to receive software or technology controlled under these U.S. export control laws and regulations without sponsorship for an export license.  TRAVEL   Up to 10% travel may be required.  WORKING CONDITIONS and PHYSICAL REQUIREMENTS    Work will normally be performed in an office and laboratory environment and around technical equipment including computers and lasers.  Able to sit, stand, bend, lift and carry up to 40 pounds without assistance.  Able to efficiently use automated office equipment such as laptops, copiers, and printers; able to effectively engage in communications (via phone, computer, or in-person).  Any required Personal Protective Equipment will be provided and must be properly used in accordance with company requirements. 

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